PMID- 22084980
OWN - NLM
STAT- MEDLINE
DCOM- 20120417
LR  - 20131121
IS  - 1936-086X (Electronic)
IS  - 1936-0851 (Linking)
VI  - 5
IP  - 12
DP  - 2011 Dec 27
TI  - Flexible, low-voltage, and low-hysteresis PbSe nanowire field-effect transistors.
PG  - 10074-83
LID - 10.1021/nn203948x [doi]
AB  - We report low-hysteresis, ambipolar bottom gold contact, colloidal PbSe nanowire 
      (NW) field-effect transistors (FETs) by chemically modifying the silicon dioxide 
      (SiO(2)) gate dielectric surface to overcome carrier trapping at the NW-gate 
      dielectric interface. While water bound to silanol groups at the SiO(2) surface 
      are believed to give rise to hysteresis in FETs of a wide range of nanoscale 
      materials, we show that dehydration and silanization are insufficient in reducing 
      PbSe NW FET hysteresis. Encapsulating PbSe NW FETs in cured poly(methyl) 
      methacrylate (PMMA), dehydrates and uniquely passivates the SiO(2) surface, to 
      form low-hysteresis FETs. Annealing predominantly p-type ambipolar PbSe NW FETs 
      switches the FET behavior to predominantly n-type ambipolar, both with and 
      without PMMA passivation. Heating the PbSe NW devices desorbs surface bound 
      oxygen, even present in the atmosphere of an inert glovebox. Upon cooling, 
      overtime oxygen readsorption switches the FET polarity to predominantly p-type 
      ambipolar behavior, but PMMA encapsulation maintains low hysteresis. 
      Unfortunately PMMA is sensitive to most solvents and heat treatments and 
      therefore its application for nanostructured material deposition and doping is 
      limited. Seeking a robust, general platform for low-hysteresis FETs we explored a 
      variety of hydroxyl-free substrate surfaces, including silicon nitride, 
      polyimide, and parylene, which show reduced electron trapping, but still large 
      hysteresis. We identified a robust dielectric stack by assembling 
      octadecylphosphonic acid (ODPA) on aluminum oxide (Al(2)O(3)) to form 
      low-hysteresis FETs. We further integrated the ODPA/Al(2)O(3) gate dielectric 
      stack on flexible substrates to demonstrate low-hysteresis, low-voltage FETs, and 
      the promise of these nanostructured materials in flexible, electronic circuitry.
FAU - Kim, David K
AU  - Kim DK
AD  - Department of Materials Science and Engineering, University of Pennsylvania, 
      Philadelphia, Pennsylvania, United States.
FAU - Lai, Yuming
AU  - Lai Y
FAU - Vemulkar, Tarun R
AU  - Vemulkar TR
FAU - Kagan, Cherie R
AU  - Kagan CR
LA  - eng
PT  - Journal Article
PT  - Research Support, U.S. Gov't, Non-P.H.S.
DEP - 20111121
PL  - United States
TA  - ACS Nano
JT  - ACS nano
JID - 101313589
RN  - 0 (Selenium Compounds)
RN  - 12069-00-0 (lead selenide)
RN  - 2P299V784P (Lead)
SB  - IM
MH  - Elastic Modulus
MH  - Equipment Design
MH  - Equipment Failure Analysis
MH  - Lead/*chemistry
MH  - Nanostructures/*chemistry/*ultrastructure
MH  - Nonlinear Dynamics
MH  - Particle Size
MH  - Selenium Compounds/*chemistry
MH  - *Transistors, Electronic
EDAT- 2011/11/17 06:00
MHDA- 2012/04/18 06:00
CRDT- 2011/11/17 06:00
PHST- 2011/11/17 06:00 [entrez]
PHST- 2011/11/17 06:00 [pubmed]
PHST- 2012/04/18 06:00 [medline]
AID - 10.1021/nn203948x [doi]
PST - ppublish
SO  - ACS Nano. 2011 Dec 27;5(12):10074-83. doi: 10.1021/nn203948x. Epub 2011 Nov 21.