PMID- 24517810
OWN - NLM
STAT- PubMed-not-MEDLINE
DCOM- 20141010
LR  - 20140212
IS  - 1089-7623 (Electronic)
IS  - 0034-6748 (Linking)
VI  - 85
IP  - 1
DP  - 2014 Jan
TI  - High density, multi-range analog output Versa Module Europa board for control 
      system applications.
PG  - 015105
LID - 10.1063/1.4857815 [doi]
AB  - A new VMEDAC64, 12-bit 64 channel digital-to-analog converter, a Versa Module 
      Europa (VME) module, features 64 analog voltage outputs with user selectable 
      multiple ranges, has been developed for control system applications at Inter 
      University Accelerator Centre. The FPGA (Field Programmable Gate Array) is the 
      module's core, i.e., it implements the DAC control logic and complexity of VMEbus 
      slave interface logic. The VMEbus slave interface and DAC control logic are 
      completely designed and implemented on a single FPGA chip to achieve high density 
      of 64 channels in a single width VME module and will reduce the module count in 
      the control system applications, and hence will reduce the power consumption and 
      cost of overall system. One of our early design goals was to develop the VME 
      interface such that it can be easily integrated with the peripheral devices and 
      satisfy the timing specifications of VME standard. The modular design of this 
      module reduces the amount of time required to develop other custom modules for 
      control system. The VME slave interface is written as a single component inside 
      FPGA which will be used as a basic building block for any VMEbus interface 
      project. The module offers multiple output voltage ranges depending upon the 
      requirement. The output voltage range can be reduced or expanded by writing range 
      selection bits in the control register. The module has programmable refresh rate 
      and by default hold capacitors in the sample and hold circuit for each channel 
      are charged periodically every 7.040 ms (i.e., update frequency 284 Hz). Each 
      channel has software controlled output switch which disconnects analog output 
      from the field. The modularity in the firmware design on FPGA makes the debugging 
      very easy. On-board DC/DC converters are incorporated for isolated power supply 
      for the analog section of the board.
FAU - Singh, Kundan
AU  - Singh K
AD  - Inter-University Accelerator Centre, P. O. Box 10502, New Delhi 110067, India.
FAU - Das, Ajit Lal
AU  - Das AL
AD  - Netaji Subhas Institute of Technology (NSIT), New Delhi, India.
LA  - eng
PT  - Journal Article
PL  - United States
TA  - Rev Sci Instrum
JT  - The Review of scientific instruments
JID - 0405571
EDAT- 2014/02/13 06:00
MHDA- 2014/02/13 06:01
CRDT- 2014/02/13 06:00
PHST- 2014/02/13 06:00 [entrez]
PHST- 2014/02/13 06:00 [pubmed]
PHST- 2014/02/13 06:01 [medline]
AID - 10.1063/1.4857815 [doi]
PST - ppublish
SO  - Rev Sci Instrum. 2014 Jan;85(1):015105. doi: 10.1063/1.4857815.