PMID- 28191441
OWN - NLM
STAT- PubMed-not-MEDLINE
LR  - 20200930
IS  - 2196-5404 (Print)
IS  - 2196-5404 (Electronic)
IS  - 2196-5404 (Linking)
VI  - 3
IP  - 1
DP  - 2016
TI  - Accurate extraction of WSe2 FETs parameters by using pulsed I-V method at various 
      temperatures.
PG  - 31
LID - 10.1186/s40580-016-0091-9 [doi]
LID - 31
AB  - This work investigates the intrinsic characteristics of multilayer WSe(2) field 
      effect transistors (FETs) by analysing Pulsed I-V (PIV) and DC characteristics 
      measured at various temperatures. In DC measurement, unwanted charge trapping due 
      to the gate bias stress results in I-V curves different from the intrinsic 
      characteristic. However, PIV reduces the effect of gate bias stress so that 
      intrinsic characteristic of WSe(2) FETs is obtained. The parameters such as 
      hysteresis, field effect mobility (mu(eff)), subthreshold slope (SS), and 
      threshold voltage (V(th)) measured by PIV are significantly different from those 
      obtained by DC measurement. In PIV results, the hysteresis is considerably 
      reduced compared with DC measurement, because the charge trapping effect is 
      significantly reduced. With increasing temperature, the field effect mobility 
      (mu(eff)) and subthreshold swing (SS) are deteriorated, and threshold voltage 
      (V(th)) decreases.
FAU - Lee, Sung Tae
AU  - Lee ST
AD  - Department of Electrical and Computer Engineering, Seoul National University, 
      Seoul, 151-747 South Korea.
FAU - Cho, In Tak
AU  - Cho IT
AD  - Department of Electrical and Computer Engineering, Seoul National University, 
      Seoul, 151-747 South Korea.
FAU - Kang, Won Mook
AU  - Kang WM
AD  - Department of Electrical and Computer Engineering, Seoul National University, 
      Seoul, 151-747 South Korea.
FAU - Park, Byung Gook
AU  - Park BG
AD  - Department of Electrical and Computer Engineering, Seoul National University, 
      Seoul, 151-747 South Korea.
FAU - Lee, Jong-Ho
AU  - Lee JH
AD  - Department of Electrical and Computer Engineering, Seoul National University, 
      Seoul, 151-747 South Korea.
LA  - eng
PT  - Journal Article
DEP - 20161121
PL  - England
TA  - Nano Converg
JT  - Nano convergence
JID - 101695675
PMC - PMC5271170
OTO - NOTNLM
OT  - DC method
OT  - Pulsed I-V method
OT  - Temperature
OT  - Two-dimensional materials
OT  - WSe2 FETs
EDAT- 2017/02/14 06:00
MHDA- 2017/02/14 06:01
PMCR- 2016/11/21
CRDT- 2017/02/14 06:00
PHST- 2016/08/09 00:00 [received]
PHST- 2016/10/17 00:00 [accepted]
PHST- 2017/02/14 06:00 [entrez]
PHST- 2017/02/14 06:00 [pubmed]
PHST- 2017/02/14 06:01 [medline]
PHST- 2016/11/21 00:00 [pmc-release]
AID - 91 [pii]
AID - 10.1186/s40580-016-0091-9 [doi]
PST - ppublish
SO  - Nano Converg. 2016;3(1):31. doi: 10.1186/s40580-016-0091-9. Epub 2016 Nov 21.