PMID- 29597331
OWN - NLM
STAT- PubMed-not-MEDLINE
DCOM- 20180330
LR  - 20181114
IS  - 1424-8220 (Electronic)
IS  - 1424-8220 (Linking)
VI  - 18
IP  - 4
DP  - 2018 Mar 28
TI  - A New FPGA Architecture of FAST and BRIEF Algorithm for On-Board Corner Detection 
      and Matching.
LID - 10.3390/s18041014 [doi]
LID - 1014
AB  - Although some researchers have proposed the Field Programmable Gate Array (FPGA) 
      architectures of Feature From Accelerated Segment Test (FAST) and Binary Robust 
      Independent Elementary Features (BRIEF) algorithm, there is no consideration of 
      image data storage in these traditional architectures that will result in no 
      image data that can be reused by the follow-up algorithms. This paper proposes a 
      new FPGA architecture that considers the reuse of sub-image data. In the proposed 
      architecture, a remainder-based method is firstly designed for reading the 
      sub-image, a FAST detector and a BRIEF descriptor are combined for corner 
      detection and matching. Six pairs of satellite images with different textures, 
      which are located in the Mentougou district, Beijing, China, are used to evaluate 
      the performance of the proposed architecture. The Modelsim simulation results 
      found that: (i) the proposed architecture is effective for sub-image reading from 
      DDR3 at a minimum cost; (ii) the FPGA implementation is corrected and efficient 
      for corner detection and matching, such as the average value of matching rate of 
      natural areas and artificial areas are approximately 67% and 83%, respectively, 
      which are close to PC's and the processing speed by FPGA is approximately 31 and 
      2.5 times faster than those by PC processing and by GPU processing, respectively.
FAU - Huang, Jingjin
AU  - Huang J
AD  - School of Precision Instrument & Opto-Electronics Engineering, Tianjin 
      University, Tianjin 300072, China. jingjin_huang@tju.edu.cn.
FAU - Zhou, Guoqing
AU  - Zhou G
AD  - School of Precision Instrument & Opto-Electronics Engineering, Tianjin 
      University, Tianjin 300072, China. gzhou@glut.edu.cn.
AD  - Guangxi Key Laboratory for Spatial Information and Geomatics, Guilin University 
      of Technology, Guilin 541004, China. gzhou@glut.edu.cn.
FAU - Zhou, Xiang
AU  - Zhou X
AD  - School of Microelectronics, Tianjin University, Tianjin 300072, China. 
      zqx0711@tju.edu.cn.
FAU - Zhang, Rongting
AU  - Zhang R
AD  - School of Precision Instrument & Opto-Electronics Engineering, Tianjin 
      University, Tianjin 300072, China. zrt65@tju.edu.cn.
LA  - eng
PT  - Journal Article
DEP - 20180328
PL  - Switzerland
TA  - Sensors (Basel)
JT  - Sensors (Basel, Switzerland)
JID - 101204366
PMC - PMC5948726
OTO - NOTNLM
OT  - BRIEF
OT  - Detection &amp
OT  - FAST
OT  - FPGA architecture
OT  - Matching
OT  - corner feature
COIS- The authors declare no conflict of interest.
EDAT- 2018/03/31 06:00
MHDA- 2018/03/31 06:01
PMCR- 2018/04/01
CRDT- 2018/03/31 06:00
PHST- 2018/02/24 00:00 [received]
PHST- 2018/03/23 00:00 [revised]
PHST- 2018/03/26 00:00 [accepted]
PHST- 2018/03/31 06:00 [entrez]
PHST- 2018/03/31 06:00 [pubmed]
PHST- 2018/03/31 06:01 [medline]
PHST- 2018/04/01 00:00 [pmc-release]
AID - s18041014 [pii]
AID - sensors-18-01014 [pii]
AID - 10.3390/s18041014 [doi]
PST - epublish
SO  - Sensors (Basel). 2018 Mar 28;18(4):1014. doi: 10.3390/s18041014.