PMID- 30602704
OWN - NLM
STAT- PubMed-not-MEDLINE
DCOM- 20190103
LR  - 20200225
IS  - 1424-8220 (Electronic)
IS  - 1424-8220 (Linking)
VI  - 19
IP  - 1
DP  - 2018 Dec 31
TI  - Practical Guidelines for Approaching the Implementation of Neural Networks on 
      FPGA for PAPR Reduction in Vehicular Networks.
LID - 10.3390/s19010116 [doi]
LID - 116
AB  - Nowadays, the sensor community has become wireless, increasing their potential 
      and applications. In particular, these emerging technologies are promising for 
      vehicles' communications (V2V) to dramatically reduce the number of fatal roadway 
      accidents by providing early warnings. The ECMA-368 wireless communication 
      standard has been developed and used in wireless sensor networks and it is also 
      proposed to be used in vehicular networks. It adopts Multiband Orthogonal 
      Frequency Division Multiplexing (MB-OFDM) technology to transmit data. However, 
      the large power envelope fluctuation of OFDM signals limits the power efficiency 
      of the High Power Amplifier (HPA) due to nonlinear distortion. This is especially 
      important for mobile broadband wireless and sensors in vehicular networks. Many 
      algorithms have been proposed for solving this drawback. However, complexity and 
      implementations are usually an issue in real developments. In this paper, the 
      implementation of a novel architecture based on multilayer perceptron artificial 
      neural networks on a Field Programmable Gate Array (FPGA) chip is evaluated and 
      some guidelines are drawn suitable for vehicular communications. The proposed 
      implementation improves performance in terms of Peak to Average Power Ratio 
      (PAPR) reduction, distortion and Bit Error Rate (BER) with much lower complexity. 
      Two different chips have been used, namely, Xilinx and Altera and a comparison is 
      also provided. As a conclusion, the proposed implementation allows a minimal 
      consumption of the resources jointly with a higher maximum frequency, higher 
      performance and lower complexity.
FAU - Louliej, Abdelhamid
AU  - Louliej A
AUID- ORCID: 0000-0002-7569-0208
AD  - GECOS Lab, National School of Applied Sciences, Cadi Ayyad University, 40000 
      Marrakech, Morocco. a.louliej@uca.ma.
FAU - Jabrane, Younes
AU  - Jabrane Y
AUID- ORCID: 0000-0002-5067-6784
AD  - GECOS Lab, National School of Applied Sciences, Cadi Ayyad University, 40000 
      Marrakech, Morocco. y.jabrane@uca.ma.
FAU - Gil Jimenez, Victor P
AU  - Gil Jimenez VP
AUID- ORCID: 0000-0001-7029-1710
AD  - Department of Signal Theory and Communications, University Carlos III of Madrid, 
      Leganes, 28911 Madrid, Spain. vgil@tsc.uc3m.es.
FAU - Garcia Armada, Ana
AU  - Garcia Armada A
AUID- ORCID: 0000-0002-8495-6151
AD  - Department of Signal Theory and Communications, University Carlos III of Madrid, 
      Leganes, 28911 Madrid, Spain. agarcia@tsc.uc3m.es.
LA  - eng
GR  - TEC2017-90093-C3-2-R/Ministerio de Economia y Competitividad/
GR  - TEC2014-59255-C3-3-R/Ministerio de Economia y Competitividad/
PT  - Journal Article
DEP - 20181231
PL  - Switzerland
TA  - Sensors (Basel)
JT  - Sensors (Basel, Switzerland)
JID - 101204366
PMC - PMC6339184
OTO - NOTNLM
OT  - ECMA-368
OT  - FPGA implementation
OT  - neural networks
OT  - peak to average power ratio
COIS- The authors declare no conflict of interest. The funding sponsors had no role in 
      the design of this research, in the analyses, interpretation data and decision to 
      publish the results.
EDAT- 2019/01/04 06:00
MHDA- 2019/01/04 06:01
PMCR- 2019/01/01
CRDT- 2019/01/04 06:00
PHST- 2018/11/16 00:00 [received]
PHST- 2018/12/12 00:00 [revised]
PHST- 2018/12/25 00:00 [accepted]
PHST- 2019/01/04 06:00 [entrez]
PHST- 2019/01/04 06:00 [pubmed]
PHST- 2019/01/04 06:01 [medline]
PHST- 2019/01/01 00:00 [pmc-release]
AID - s19010116 [pii]
AID - sensors-19-00116 [pii]
AID - 10.3390/s19010116 [doi]
PST - epublish
SO  - Sensors (Basel). 2018 Dec 31;19(1):116. doi: 10.3390/s19010116.