PMID- 33507060 OWN - NLM STAT- PubMed-not-MEDLINE LR - 20210224 IS - 1936-086X (Electronic) IS - 1936-0851 (Linking) VI - 15 IP - 2 DP - 2021 Feb 23 TI - Satisfiability Attack-Resistant Camouflaged Two-Dimensional Heterostructure Devices. PG - 3453-3467 LID - 10.1021/acsnano.0c10651 [doi] AB - Reverse engineering (RE) is one of the major security threats to the semiconductor industry due to the involvement of untrustworthy parties in an increasingly globalized chip manufacturing supply chain. RE efforts have already been successful in extracting device level functionalities from an integrated circuit (IC) with very limited resources. Camouflaging is an obfuscation method that can thwart such RE. Existing work on IC camouflaging primarily involves transformable interconnects and/or covert gates where variation in doping and dummy contacts hide the circuit structure or build cells that look alike but have different functionalities. Emerging solutions, such as polymorphic gates based on a giant spin Hall effect and Si nanowire field effect transistors (FETs), are also promising but add significant area overhead and are successfully decamouflaged by the satisfiability solver (SAT)-based RE techniques. Here, we harness the properties of two-dimensional (2D) transition-metal dichalcogenides (TMDs) including MoS(2), MoSe(2), MoTe(2), WS(2), and WSe(2) and their optically transparent transition-metal oxides (TMOs) to demonstrate area efficient camouflaging solutions that are resilient to SAT attack and automatic test pattern generation attacks. We show that resistors with resistance values differing by 5 orders of magnitude, diodes with variable turn-on voltages and reverse saturation currents, and FETs with adjustable conduction type, threshold voltages, and switching characteristics can be optically camouflaged to look exactly similar by engineering TMO/TMD heterostructures, allowing hardware obfuscation of both digital and analog circuits. Since this 2D heterostructure devices family is intrinsically camouflaged, NAND/NOR/AND/OR gates in the circuit can be obfuscated with significantly less area overhead, allowing 100% logic obfuscation compared to only 5% for complementary metal oxide semiconductor (CMOS)-based camouflaging. Finally, we demonstrate that the largest benchmarking circuit from ISCAS'85, comprised of more than 4000 logic gates when obfuscated with the CMOS-based technique, is successfully decamouflaged by SAT attack in <40 min; whereas, it renders to be invulnerable even in more than 10 h when camouflaged with 2D heterostructure devices, thereby corroborating our hypothesis of high resilience against RE. Our approach of connecting material properties to innovative devices to secure circuits can be considered as a one of a kind demonstration, highlighting the benefits of cross-layer optimization. FAU - Wali, Akshay AU - Wali A AD - Department of Electrical Engineering, Pennsylvania State University, University Park, Pennsylvania 16802, United States. FAU - Kundu, Shamik AU - Kundu S AD - Department of Electrical and Computer Engineering, University of Texas at Dallas, Richardson, Texas 75080, United States. FAU - Arnold, Andrew J AU - Arnold AJ AUID- ORCID: 0000-0002-9790-2128 AD - Department of Electrical Engineering, Pennsylvania State University, University Park, Pennsylvania 16802, United States. FAU - Zhao, Guangwei AU - Zhao G AD - Department of Electrical and Computer Engineering, University of Texas at Dallas, Richardson, Texas 75080, United States. FAU - Basu, Kanad AU - Basu K AD - Department of Electrical and Computer Engineering, University of Texas at Dallas, Richardson, Texas 75080, United States. FAU - Das, Saptarshi AU - Das S AUID- ORCID: 0000-0002-0188-945X AD - Department of Engineering Science and Mechanics, Pennsylvania State University, University Park, Pennsylvania 16802, United States. AD - Department of Materials Science and Engineering, Pennsylvania State University, University Park, Pennsylvania 16802, United States. AD - Materials Research Institute, Pennsylvania State University, University Park, Pennsylvania 16802, United States. LA - eng PT - Journal Article DEP - 20210128 PL - United States TA - ACS Nano JT - ACS nano JID - 101313589 SB - IM OTO - NOTNLM OT - camouflaging OT - integrated circuit OT - reverse engineering OT - security OT - two-dimensional materials EDAT- 2021/01/29 06:00 MHDA- 2021/01/29 06:01 CRDT- 2021/01/28 12:12 PHST- 2021/01/29 06:00 [pubmed] PHST- 2021/01/29 06:01 [medline] PHST- 2021/01/28 12:12 [entrez] AID - 10.1021/acsnano.0c10651 [doi] PST - ppublish SO - ACS Nano. 2021 Feb 23;15(2):3453-3467. doi: 10.1021/acsnano.0c10651. Epub 2021 Jan 28.